Power

The power optimization worths some more words: all the attempts to optimize exclusively the power of the gates of table 5.1 in spite of the delay have led to the same result, for both technologies: all the transistors in the circuit had the minimum width after the optimization. This outcome will arise whatever would be the starting point of the optimization session, i.e. the initial transistor widths of the circuit.
This is an experimental proof that, out of the three terms of equation (5.2) (page ), the term of the switching power $P_{\textrm{switch}}$, due to charging and discharging of capacitances in the circuit, is always the dominant one. Although some authors in the past argue that this term could not be the largest, especially for deep sub-micron circuits, there is not an experimental proof of that, at least for small and medium circuits.