Delay measurement obtained by the FAST model and by HSPICE

Figure 5.7: HSPICE delay: convex function

The delay obtained by the FAST model and HSPICE simulations is a measure and not a formula. It is a correspondence one-to-one between the MOSFET widths and the resulting delay and it is not possible to express this delay by means of a closed form formula¹⁷.

The figures 5.7, 5.8 represent the delay of CMOS inverter, increasing in an uniform manner the dimension of both the n-MOSFET and the p-MOSFET. The first figure shows the delay of the inverter driven by another inverter (with fixed dimensions) simulated by HSPICE; the second figure shows the delay of the same inverter driven, instead, by an ideal voltage source and simulated by FAST.
These are an experimental proof of the statement given in the previous section: if the voltage source is not ideal, that is dependent from the MOSFET widths of the circuit, the delay curve is strictly convex (figure 5.7), while if the voltage source is ideal, i.e. independent from the MOSFET widths, then the delay curve is decreasing monotonically (but still convex).
Taking into account the interconnection delays, which can be no more negligible in the deep sub-micron, does not modify the delay function, since a width independent¹⁸ delay is added to the total delay function.

So, definitively, the delay curve is a convex function, strictly or not, depending of the operating condition of the circuit, of all the MOSFET widths¹⁹.

Figure 5.8: FAST delay: monotonic function